Module softfloat 

IEEE-754 binary64 on integer lanes: the VM’s Float arithmetic, exact to the bit, for devices whose silicon has no binary64 unit.

Every operation unpacks to sign, exponent and a normalized 53-bit significand, computes the exact significand result with the multi-word core (wide products, restoring division, digit-by-digit square root), and rounds once to nearest-even in round_pack, which also produces subnormals, overflow to infinity, and the signed zeros. Special operands (NaN, infinities, zeros) are resolved by selects beside the finite path. A NaN result follows the x86 rule the host runs by: the first NaN operand, quieted, or the default NaN 0xFFF8_0000_0000_0000 for an invalid operation.

Values are 64-bit words of this builder’s lanes (int64::n64); exponents are 64-bit two’s complement.

Structs

Unpacked

A binary64 operand taken apart.

Constants

DEFAULT_NAN

The x86 default NaN an invalid operation produces.

Functions

abs

|x|.

add

a + b (negate_b makes it a − b).

approx_eq_ints

The VM’s is approximately on two integers: both converted to f64, equal, or apart by at most max(1e-9 · max(|a|, |b|), 1e-12).

compare

The IEEE comparisons as 0/1: (a < b, a ≤ b, a == b). NaN compares false; −0 == +0.

div

a ÷ b. A zero divisor yields the IEEE result (∞, or NaN for 0 ÷ 0); the VM’s failure there is the cell’s divergence, reported beside this value.

floor_to_int

f.floor() as i64: NaN is 0, and the conversion saturates at the i64 bounds.

from_int

i64 as f64, nearest-even.

mul

a × b.

round_pack

Round sig × 2^(exp − 62) to binary64, nearest-even, and pack it with sign. sig has its leading bit at 62 (a nonzero significand), with any lost low bits folded into bit 0 as a sticky bit. The one rounding every operation performs: normal results, gradual underflow to subnormals, and overflow to infinity.

sqrt

√a.

unpack

Take x apart. Subnormals are normalized here, so every finite nonzero operand leaves with its leading significand bit at 52.