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Module lane

Module lane 

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The lane machine: what a device’s integer datapath can actually do, at the width it actually has.

A device word is word bits (32 on a Plasticine PCU or an SN50 lane, two on the analog plane’s digit columns), and its multiplier takes operands of mul bits whose product fits one word. Every 64-bit integer and binary64 operation a region needs is a Routine over these words, built once by the multi-word core and the softfloat (super::multiword, super::softfloat) and executed by whichever Lanes the device is: exact digital lanes, or the analog plane under its physics model. No routine assumes a unit the shape does not declare.

A routine is a small imperative program: instructions over lane registers, and fixed-count Repeat blocks. Nothing in it branches on data; control that depends on a value is a LOp::Sel, so the same program is a straight-line datapath on a dataflow chip and a sequencer microprogram on the analog plane’s digital control side.

Structs§

ExactLanes
Exact digital lanes: the units a PCU or an RDU lane has, at their declared width.
LInst
An instruction: an operation and the register(s) it writes. dst2 is the carry/borrow of Add/Sub.
LaneCounts
How many of each kind of lane operation a run performed: the cost a device pays for a routine.
LaneShape
The integer datapath a device has: word-bit words (a power of two dividing 32), and a multiplier whose mul-bit operands give a product that fits one word (2 × mul ≤ word, mul dividing word).
Routine
A lane routine: its inputs and outputs as registers, its body, and the register file size.

Enums§

LOp
One lane operation. Operands are registers; results are words, carries and predicates are 0 or 1.
LStmt
A statement: an instruction, or a body repeated a fixed number of times (registers carry across trips).
LaneFault
Why a routine could not run: a builder bug the interpreter refuses to paper over.

Traits§

Lanes
A device’s datapath executing lane operations. The arithmetic ones are where devices differ (exact digital units, or the analog plane settling a column); the rest are the digital side of every device.

Functions§

join_u64
Join little-endian words back into a 64-bit value (words past bit 63 are ignored).
join_u128
Join little-endian words into a 128-bit value.
run
Run routine on lanes with inputs (one word per input register); the output words, and what it cost.
split_u64
Split a 64-bit value into n little-endian words of shape.word bits.
split_u128
Split a 128-bit value into n little-endian words.

Type Aliases§

LReg
A lane register: one word of the device’s datapath.