Module int64 

The VM’s 64-bit integer operations on narrow lanes: each is the checked semantics of fabric_rtl::{AluOp, FuncUnit, CmpKind}::eval_checked, built from the multi-word core. A result that leaves i64, a zero divisor or an exponent the VM refuses is reported in the fault word as the divergence’s code, never as a wrapped value.

Constants

FAULT_BITS

The bits of a routine’s fault word: 0, or a Divergence code.

Functions

add

a + b, faulting where the VM promotes.

bool64

A 0/1 predicate as a 64-bit value.

div

a / b truncating, as the VM’s Div on two Ints.

fault_when

A fault word that is d’s code when cond is 1, else otherwise.

floor_div

a // b rounding toward negative infinity, as the VM’s FloorDiv on two Ints.

magnitude

(|a|, sign) of a two’s-complement value; |MIN| is 2^63, exact in the unsigned width.

mul

a × b, faulting where the VM promotes.

mul_checked

The signed product of two 64-bit values and 1 when it leaves i64.

mul_hi_u

The high word of the unsigned 128-bit product.

mul_ovf_s

1 when the signed product leaves i64, as a 64-bit value.

n64

The words of a 64-bit value on this builder’s lanes.

nfault

The fault words of this builder’s lanes.

no_fault

No fault.

popcount

The set bits of the 64-bit pattern, as a 64-bit value.

pow

a ** b by square-and-multiply over the exponent’s 32 bits, on magnitudes: a factor that overflowed counts only when a later set exponent bit multiplies it in, which is exactly when the VM’s exact power leaves i64.

rem

a % b taking the dividend’s sign, as the VM’s Mod on two Ints.

shl

a.wrapping_shl(b as u32).

shr

a.wrapping_shr(b as u32) on the signed value (arithmetic).

sub

a − b, faulting where the VM promotes.

ushr

(a as u64).wrapping_shr(b as u32) (logical).