pub fn shrinking_generator(
a_taps: &[bool],
a_seed: &[bool],
s_taps: &[bool],
s_seed: &[bool],
out_len: usize,
) -> Vec<bool>Expand description
The shrinking generator: clock register A (feedback a_taps, seed a_seed) gates data register S
(feedback s_taps, seed s_seed), emitting S’s bit exactly when A’s bit is 1, until out_len
bits are produced. Its output is a data-dependent decimation of S with very high linear complexity.