pub fn attack_shrinking_generator(
output: &[bool],
a_taps: &[bool],
s_taps: &[bool],
) -> Option<(Vec<bool>, Vec<bool>)>Expand description
Attack the shrinking generator: recover the initial states of both the clock register A (feedback
a_taps) and the data register S (feedback s_taps) from output alone, by divide-and-conquer on
the clock. Each of the 2^{L_A} clock states is tried; a guess fixes the emit positions, turning every
output bit into a linear equation ⟨r_{iₖ}, s₀⟩ = output[k] in S’s initial state, solved over GF(2)
and verified by regeneration. Returns (a_state, s_state) for the first guess that reproduces the
output, or None (clock register too large — L_A > 22 — or no consistent state). Exponential in
L_A only, not L_A + L_S.